Conventional conductive bridging random access memory (CBRAMs) devices can include memory elements programmable between different resistance levels. “Fresh” CBRAM devices (i.e., those which have just been manufactured) can be subject to an initial “forming” step, placing the memory elements into an initial state, which provides for good write performance.
However, as elements are repeatedly programmed and erased (e.g., subject to write operations), memory elements can degrade in performance, suffering from shorter data retention times and/or unacceptable write responses (e.g., resistance values are not within a desired range).